Systemverilog/Uvm Fpga Verification Engineer

Encore Semi Inc. Raleigh , NC 27604

Posted Yesterday

Position Title: Senior or Senior/Staff FPGA Verification Engineer
Location: Raleigh, NC or remote-support/work from any US location
Status: Full-time
About the Team:
Join the growing Encore Semi Front-End Development team to collaborate with customers to design, and verify large FPGA designs implementing control logic for systems which operate in harsh and remote environments. Building on your background of Functional Verification, you would join a team verifying multiple features at the unit and full-chip.
About the Project:
As a senior member of a complex FPGA development team, you would be responsible for driving the Design Verification of either blocks (units) or full-chip elements of a complete FPGA design. You will leverage your SV/UVM experience assisting the current verification team to shift into fuller deployment of this methodology while developing Verification plans, creating environments and executing tests to stress the design. One of the special focuses for design are requirements for long-term operation in harsh environments. These requirements drive additional design elements (such as additional error detection, correction and redundancy) and add interesting requirements to demonstrating extreme functional correctness which increases the challenge and complexity of demonstrating a highly functional design ready for production. If you have SV / UVM Verification experience with environments, stimulus, random stress and deploying a coverage-based approach, joining the Encore Semi Verification team could be for you.
Minimum Qualifications:
Functional (Design) Verification at the block or SOC / Full-Chip level using simulation models. Experience should include creating Verification Plans from the Microarchitecture Specifications and ability to understand the RTL
SV/UVM methodology expertise to create Verification environments and drive Functional Verification including test / stimulus creation and debugging failures to root cause
Computer architecture background to enable flexibility to validate multiple different areas of the design
7+ years of Design Verification experience including working with RTL Developers
MUST be US Citizen
Preferred Qualifications:
Experience with IP blocks such as Serial RapidIO (sRIO), DDR3, memories, internal interconnects, SerDes, ECC, TMR
Experience with Verification for FPGA designs (esp using Xilinx FPGAs) is a positive in addition to DV for SOC / ASICs
Experience using Mentor Graphics tools including simulation (Questasim) and emulation (Veloce)
Education Requirements:
Required: Bachelor's, Electrical Engineering
Preferred: Master's, Electrical Engineering
About Encore Semi
Encore Semi is a successful SoC Design and Software Engineering Services company headquartered in San Diego, California. We build Centers of Expertise (CoEs), engineering teams onsite, to support our many customers from the semiconductor and electronics system industry in North America (San Diego, Bay Area, Austin, Raleigh, Longmont, New York, Boston areas). Our teams of experts contribute to leading-edge projects in the areas of SoC design and embedded software. We provide high-value through acceleration, performance improvement, optimization, and risk mitigation.
Encore Semi provides its engineering team members with continuous exposure to top advanced technologies and tools, participation in challenging yet exciting projects, and direct collaboration with its industry-leading teams, customers, and long-term partners. Encore Semi Career Path & Encore Semi Full-time Benefits
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Systemverilog/Uvm Fpga Verification Engineer

Encore Semi Inc.