As an emulation support engineer you will be involved in developing, implementing and deploying simulation acceleration and emulation using Synopsys ZeBu-S3, Cadence palladium Z1.
Create synthesizable/emulate-able models for some modules of the system. Develop methodology/tool flow for running system tests/SW applications/boot OS on emulator. Use emulator effectively to test various areas of the chip using simulation acceleration, coverage, and power aware emulation.
Help reproduce post-silicon failures on emulator and help with reproduction of failures in emulator on simulation. Closely work with RTL/verification/design/SW engineers for debug and root-cause. Develop and debug related RTL models, assertions, collateral.
Education Minimum BS (EE or CS) required with over 7 years relevant experience. Location Engineer must work at our Sunnyvale facility, unless he/she has special needs.
System Level Emulation Compilation and Support Skills/Experience Required
Prior experience with hardware emulation (Synopsys ZeBu-S3, Cadence Palladium XP II/Z1) must have
Strong scripting skills (Python, Ruby, TCL, Shell etc.) must have
Prior experience with RTL (synthesizable) coding, Verilog coding preferred must have
Expertise in waveform debugging using Verdi must have
Experience in C/C++/System-C programming must have
Excellent hands-on experience with SOC verification
Excellent communication skills and demonstrate the desire to take on diverse challenges
Experience with Verilog/SV will be a plus
Design verification knowledge on UVM, transactor model, assertion, coverage will be a plus
PCIe knowledge a plus
x86_64 knowledge a plus
Cadence Palladium,Verdi, RTL
Spartan Solutions Inc.