Staff Fpga Architect And Design Engineer

Overview

The FPGA Architect and Hardware Engineer (IV) will architect and develop world class video, audio and control products with an experienced team of software, firmware, and hardware engineers. If you have always wanted to be a big part of a small team, this job is for you! A successful candidate must be self-motivated, passionate, persistent, and creative. You will have to find solutions to difficult problems or figure out clever ways to work around them when necessary.

Base Pay Range 131,000 - 176,000

We will be accepting applications until a final candidate is identified.

The above reflects the pay range that QSC reasonably expects to pay for this role. This pay range also depends on various factors such as job duties and requirements, relevant experience and skills and geographic location. In addition to the base salary range, QSC offers a comprehensive package including but not limited to health benefits, 401K or Roth retirement plans, generous time off and profit sharing.

QSC thrives where innovative technology and compelling audio-visual experiences intersect. For over 50 years, QSC has pioneered the technology and solutions that enable immersive cinema, live performance audio, themed entertainment, digital collaboration and meeting experiences for our customers and partners around the world. A globally recognized innovator in the design, engineering, and manufacture of category leading high-performance loudspeakers, digital mixers, power amplifiers, audio processors, digital cinema solutions, and the Q-SYS software-based audio, video and control Ecosystem.

By joining the QSC team, you will be in a challenging, collaborative, fun, and innovative environment. We encourage employees to take ownership, to color outside the lines, and to imagine possibilities. Our culture is casual but dynamic, with cross-functional teams collaborating on creating memorable audio-visual experiences that deliver joy to people, wherever they are. At QSC, fun and hard work go hand in hand. Join us and make a difference in the way people experience movies, meetings, presentations, live performances, and much more.

Responsibilities

• Architect FPGA/HDL solutions for high bandwidth/high channel count video and audio

• Write HDL, libraries and testbenches to facilitate rapid design deployment and reuse

• Resource planning and part selection for new projects

• Implement/optimize design/timing constraints to achieve STA closure on challenging designs

• Review and architect video and audio hardware

• Simulate, test, and validate the proper operation of the FPGA

• Work with a variety of in-house and out-of-house design and support teams on audio and video hardware

• Work with Software Quality Assurance/Test Engineering to develop appropriate product test strategies

• Performs other duties as assigned

Qualifications

• B.S. in Computer Science, Electrical Engineering, or Computer Engineering

• Minimum of 10 years of work experience in a FPGA development environment

• Minimum of 10 years of hands-on experience coding, simulating, and debugging with Verilog (SystemVerilog experience strongly preferred)

• Minimum of 4 years of hands-on experience writing and debugging C/C++ in embedded environments (Linux device driver experience strongly preferred)

• Proficiency with Xilinx Vivado/Vitis toolchain development environment

• Proficiency with Linux and embedded Linux

• Proficiency with version control tools within a team context (GIT preferred)

• Proficiency with scripting languages (Bash, TCL, GNU Make, etc.)

• Proficiency with design/timing constraints and STA closure

• Experience with soft core processors (MicroBlaze, etc.)

• Excellent architecture, design, engineering, implementation, and debugging skills

• Excellent written and verbal communication skills in English

• Ability to work effectively in a cross-functional product development team

• Must be self-motivated in order to achieve assigned objectives with minimal supervision

• Video experience is a plus

• High-speed SERDES experience is a plus

• Agile development and CI/CD familiarity is a plus