Sr. Staff Engineer - System Architect

Sr. Staff Engineer - System Architect

San Jose, CA

This role interfaces and collaborates with customers to design system

interconnect solutions for AI/ML using Ayar Labs' in-package optical I/O, a silicon

photonic chiplet technology. You will guide architectural system designs, analyze

compute systems for throughput, power, latency, and cost, and create specs for electro-

optical transceivers.

The candidate will represent Ayar Labs at standard setting organizations (SSOs) and

promote Ayar Labs' optical interconnect technology. You will collaborate with the CTO

office on pathfinding activities and roadmap developments.

Essential Functions:

• Using Ayar Labs' in-package optical I/O as the foundational technology, work with

• customers to design system interconnect solutions for AI/ML applications such as

• scale-up fabrics and direct attached memory

• Analyze compute systems for throughput, power, latency, and cost

• Create specs for electro-optical transceivers, guide architectural designs for system

• interconnects, and collaborate with design teams to ensure spec compliance

• Translate customer key interconnect specifications into protocol requirements to

• enable silicon photonic interconnects

• Work on pathfinding activities and advanced technology & product roadmaps

• Participate on SSOs such as OpenCompute, UCIe, OIF, PCI-SIG, UEC, UAL, CXL,

• and IEEE 802.3

• Participate in technology evangelization through customer presentations, conference

• papers, seminar/webinars.

Basic Requirements:

• MS in Electrical Engineering

• 5+ years of industry experience in physical designs, compute systems, and

• network/compute protocols

• Experience with HBM and DDR memory subsystems, and electrical standards such

• as UCIe, BoW, PCIe, and Ethernet.

• Experience with network protocols and compute software stacks such as RDMA,

• RoCE, Ethernet, CXL, and PCIe

• Experience with scripting languages such as Python and C++

• Self-motivated and detail-oriented

• Can collaborate and work effectively with colleague across teams and projects

• Excellent written and oral communication skills

Preferred Qualifications:

• Understanding of Ethernet, CXL, PCIe, and NVL switch architecture and fabrics

• Understanding of memory semantic fabrics and distributed compute communication models and architectures.

Principals only. Recruiters, payment for recruiting activities is only applicable subject to a signed and executed agreement between the parties. Please do not contact our hiring managers.

Pay range: $150K to $210K

At Ayar Labs we are lighting up electronics for a brighter future. With our deep ties to MIT and UC Berkeley, and our commitment to hiring the best engineers in photonics and electronics, joining our team gives you the opportunity to collaborate with brilliant people on challenging, paradigm-shifting work. Our optical I/O technology removes the bottlenecks created by today's electrical I/O, making it possible to continue the computing system performance scaling that Moore's Law enabled until now. We have a commitment to win big in the marketplace based on the strengths of our technology, and we approach everything with an eye to massive scalability. We believe that deep cross-collaboration between teams facilitated by honest, open debate is the best way to achieve big wins, leveraging our patent portfolio which promises products that deliver orders of magnitude improvements in latency, bandwidth density, and power consumption. We offer a comprehensive benefits plan designed to keep our team healthy and happy.

Resources

• Executives from Intel and GLOBALFOUNDRIES share their thoughts on Ayar Labs and the promise of in-package optical I/O (video)

• Ayar Labs in the News and Recent announcements

• LinkedIn and Twitter

Ayar Labs is an Affirmative Action/Equal Opportunity Employer and is strongly committed to all policies which will afford equal opportunity employment to all qualified persons without regard to age, national origin, race, ethnicity, creed, gender, disability, veteran status, or any other characteristic protected by law.