Sr. Staff Digital IC Design Engineer

Marvell Santa Clara , CA 95051

Posted 5 months ago

The successful candidate will be a hands-on CPU Logic Designer responsible for performing micro-architecture and logic design.

  • He/She will work on advanced processor design areas such as Out-of-Order Instruction Scheduling and Execution, Multi-Threading, high performance cache subsystem.

  • Ownership of a the Fpu Execution block, which is a major Cpu unit.

  • The design goals are a balance of high-performance, frequency, and power, and the candidate will work towards meeting those goals

  • Work with design verification engineers to recommend and help develop verification and test strategies for various design blocks

  • Work closely with Physical Design designers in implementation planning and meeting frequency targets.

  • Must have experience with microprocessor logic design demonstrated by having worked on one or more of the ARM, MIPS, SPARC, X86, PowerPC based core-processor designs.

  • Extensive experience with execution logic design (floating-point and/or integer) with floating point highly desired.

  • Knowledge of Verilog, pipelining, and low-power design techniques.

  • Experience with Design Tools, such as simulation, synthesis, waveform viewers, and debugging.

  • Experience with high-frequency design, and static timing analysis

  • Working familiarity with various families of high performance circuit techniques and their tradeoffs.

  • Must have effective interpersonal, teamwork, and communication skills.

  • Must be able and willing to work independently.

  • Must have the ability to multi-task in a fast-paced environment.

  • MS (EE or CS) required with 7+ years relevant experience.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

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Sr. Staff Digital IC Design Engineer