Marvell is a leading provider of innovative storage technologies, including ultra-fast read channels, high-performance processors, leading edge transceivers, highly efficient analog designs, and powerful cryptographic engines. These solutions address all segments of the hard disk drive (HDD) and solid-state drive (SSD) electronics markets. Many of the same technologies have been utilized in Marvell storage system solutions products, powering PCs, servers, cloud, and enterprise systems.
Marvell demonstrates storage market leadership by continually innovating solutions that deliver the industry's highest performance and lowest power consumption with cost efficiency. With a vast portfolio of storage technology building blocks, innovative design, and packaging expertise, Marvell solutions enable customers to engineer high-volume products for hard disk drive (HDD), solid-state drive (SSD), cloud, enterprise, and data center.
We have an outstanding history of delivering next generation products that are revolutionizing the way the world works. We're looking for smart, talented, like-minded people to join us on the adventure. If you want to achieve great things, then we want to talk with you!
What You Will Be Doing
Our team is building key IPs in SSD controller such as the NVMe IP and the Flash Controller IP. These IPs decide the functions and performance of SSD controller. Due to the broad range of market targets, this team is required to make design flexible to support requirements from different market segments in a short period of time.
Your Key Responsibilities Will Include
This position will expose you to many important storage technologies such as high-performance interfaces with Host and NAND, as well as advanced LDPC error correcting technology.
This position in particular is focusing on NVMe IP. The challenge of this position as a Senior Staff Design Engineer is to have a deep understanding of the NVMe protocol and employ deep innovation to develop the next generation NVMe IP, with the latest features and improvements to both the performance and efficiency of the IP to a new level.
Education & Experience Necessary for Success
MSEE with 10+ years of experience in digital design
Strong knowledge of NVMe protocol
Strong knowledge of SSD controller architecture
RTL coding experience with the Verilog/SystemVerilog language.
Familiarity of ASIC design flow
Familiarity with Simulation and Synthesis tools and flow
Good communication and interpersonal skills
UVM based test bench development experience a plus
Scripting/programming language such as PERL/Python, TCL and C/C++ a plus
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.