Sr. Design Engineer

Advanced Micro Devices, Inc. Santa Clara , CA 95051

Posted 2 weeks ago

What you do at AMD changes everything

At AMD, we push the boundaries of what is possible. We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies building blocks for gaming, immersive platforms, and the data center.

Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the "extra mile" to achieve unthinkable results. It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world. If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.

We deliver server, console, discrete graphics and low power SoCs and use the same test bench to verify all of our IP.

There are many challenges as we refine our new test bench and take on the next generation UMC architecture changes and challenges.

We are looking for a junior functional verification engineer in the Dram Controller IP at AMD's Santa Clara Design Center.

As a verification team member, your daily activities would include:

  • Develop UVM test bench components like test-cases, monitors, scoreboards, sequencers, and sequences.

  • Drive debug and closure of regression signatures using waveform viewer and output files; and collaborate with the RTL designers and test bench owners to fix bugs.

  • Develop quality, timely and cost effective solutions independently.

  • Contribute to test bench and/or IT infrastructure, helping to build a reliable, scalable, and flexible verification environment

  • Develop new test plans, functional coverage points

  • Experience with Verilog, System Verilog, and Object-Oriented Programming expertise are a requirement

  • Requires strong Programming and debug skills.

  • Knowledge of Memory Subsystem / DRAM is a plus.

  • Requires strong communication skills and the ability to work independently as well as in a cross-site team environment.

  • Strong Computer Architecture knowledge


Requisition Number: 63149

Country: United States State: California City: Santa Clara

Job Function: Design

AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers. We consider candidates regardless of age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status. Please click here for more information.

icon no score

See how you match
to the job

Find your dream job anywhere
with the LiveCareer app.
Mobile App Icon
Download the
LiveCareer app and find
your dream job anywhere
App Store Icon Google Play Icon

Boost your job search productivity with our
free Chrome Extension!

lc_apply_tool GET EXTENSION

Similar Jobs

Want to see jobs matched to your resume? Upload One Now! Remove
Sr Rfic Design Engineer

Intel Corp.

Posted 4 days ago

VIEW JOBS 4/21/2019 12:00:00 AM 2019-07-20T00:00 Sr. RFIC Design Engineer Job Description In this position you will work with engineering team and design RF and mmW CMOS IC. Key responsibility will be RFIC development. Qualifications � The ideal candidate will have at least 8 years of RFIC design experience, with 4 or more years in PLL, VCO and mixer design. � Experience with Cadence and ADS design tools � Experience designing and bringing into high volume production RF and mmW IC. This includes design of on-chip PLL, VCO, Mixer, attenuators, and amplifiers. � Experience with DFT and DFM techniques for high volume production. � Experience with fundamentals of RFIC CMOS implementation, and basic building blocks design. � Understanding of SOI, SI and SiGe process and tradeoffs. � Understanding in system specification and able to work with system architects to translate system requirement into circuit requirement at IC level � Familiar with various RF architectures and their trade-offs � Understanding of RF device modeling, including but not limited to device noise parameters, inductor modeling. Insights into packaging effects, supply isolations, high frequency ESD structures, and circuit layout for optimum RF performance. � BSEE required, MSEE preferred. Inside this Business Group The Next Generation and Standards Group's mission is to lead standards, ecosystem, and prototyping development efforts across Intel for advanced wireless communications IP, starting with 5G and beyond. This group brings together a panorama of competencies including standards creation, ecosystem development, use case and business development in creating advanced prototypes and technologies that propel Intel's leadership. In addition, the group is rapidly expanding towards integration of communications and compute with new technologies and use cases including advanced end to end communication networks, autonomous driving, drones, artificial intelligence, while continuing its leadership in 5G. NGS holds all the advanced communications and compute technology assets to deliver an exciting, converged future at the center of the intelligent data explosion. Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.... Intel Corp. Santa Clara CA

Sr. Design Engineer

Advanced Micro Devices, Inc.