Senior Test Engineer

The Microsoft Silicon team is transforming the ways people communicate, create, and collaborate through the devices and components we develop. We are a growing team of engineers on a mission to develop revolutionary designs and ship first-to-market products, and we're looking for a talented Senior Test Engineer to join our team! Azure, XBOX, Surface, and HoloLens incorporate our internally developed silicon components.

Our team is creative and resourceful; we value growth and learning. We want to amplify your abilities so you can do your best work. Join us, and together we will turn groundbreaking hardware designs into reality!

Required Qualifications

• 7+ years of related technical engineering experience OR Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience or internship experience

• OR Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience

• 7+ years' hands on experience in ATE usage, preferably Advantest 93K test platform. Pre and post silicon test engineering experience in analog mixed signal, HSIO and SOC devices.

• 3+ years' experience in ATE HW design, development and debug.

• 3+ years' experience in DFT - Design for Test techniques, product characterization

• Power / Vmin / PVT.

• 3+ years's experience in cost reduction initiatives

• Yield Improvement, test time reduction.

Other Requirements:

Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include, but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.

Preferred Qualifications and Skills

• Experience with statistical analysis

• Experience in SOC, FPGA silicon test HVM methodologies and implementation is a plus.

• Experience working with cloud hardware infrastructures and regression test execution.

• MS in Electrical Engineering.

Silicon Engineering IC4 - The typical base pay range for this role across the U.S. is USD $112,000 - $218,400 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $145,800 - $238,600 per year.

Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here: https://careers.microsoft.com/us/en/us-corporate-pay

Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, color, family or medical care leave, gender identity or expression, genetic information, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran status, race, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable laws, regulations and ordinances. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. If you need assistance and/or a reasonable accommodation due to a disability during the application or the recruiting process, please send a request via the Accommodation request form.

Benefits/perks listed below may vary depending on the nature of your employment with Microsoft and the country where you work.

• You will develop and implement technical solutions for ATE hardware and test program with high quality for Mixed-signal, SOC type devices. You'll also cross check silicon chip architecture, use performance instrumentation, and generate performance simulators and characterization reports.

• You will write complex test cases, execute test plans for complex features, and create external testing supplier plans.

• You will create a single project implementation schedule and help determine resources needed for the hardware engineering of complex features or products. You'll also identify significant project risks and communicate progress to internal and external teams.

• You will write mixed-signal, SOC typde device test plan, test and guardband methodologydevice and interpret complex details required to design various ATE hardware features and test program.