Senior Staff Asic Design Engineer

Responsibilities

MaxLinear is seeking a Senior Staff ASIC Design Engineer to join our growing team. In this role, you will focus on the following:

• Work with the ASIC verification team to define SoC verification strategies, test plans, and execution plans

• Own and be responsible for IP-level ASIC verification efforts toward SOC T/O. Participate in chip bring-up, debugging, and resolving issues

• Implement best industry practices for SoC verification. Improve and harmonize verification methodology across the organization to maximize efficiency and predictability of outcomes

• Mentor junior members in technical skills and monitor their deliverables

• Deliver test bench architecture, functional models, and complete test environments and test suites meeting coverage targets to ensure first-time silicon success

• Collaborate with the design team and project stakeholders on testability improvements and the debug process during test bench bring-up

Qualifications

• Proven track record of success in verification strategy development and execution for large SoCs, and sign-off with coverage metrics

• Hands-on knowledge of UVM methodology, SystemVerilog, and C/C++

• Implementation of directed and constrained random test benches for communication physical layers, Ethernet networking, packet processing, and multi-CPU environments

• Experience with CPU instruction set testing and cache-coherent system testing

• Knowledge of verification IP and functional coverage techniques

• Experience with gate-level simulations of delay-annotated netlists

• Exposure to FPGA emulation and lab validation

• Solid communication skills, and ability to excel and provide leadership in a fast-paced environment

• BS in Electrical Engineering or related + 7 years of experience, or MS + 5 years of experience, or Ph.D.+ 2 years of experience

Compensation and Benefits

MaxLinear has a Total Compensation philosophy which includes base salary and annual discretionary bonus eligibility and many positions also include stock-based compensation.

MaxLinear expects to offer a starting base salary within the range of: $110,100 to $170,890 Annually

We offer competitive benefits designed to support employee health, welfare, and retirement and some highlights are: health care benefits, 401k savings plan, Employee Stock Purchase Plan (ESPP), paid time off, and a hybrid work schedule.

The actual starting base salary will be determined by the match to certain role-related criteria such as educational degree(s) or equivalent, relevant work experience, skillset needed for the role, and geographic location; this is not an all-inclusive list as some roles may require unique skills or experience.

Qualified applicants will receive consideration for employment without regard to, and will not be discriminated against based on race, sex, religion, national origin, sexual orientation, gender identity, disability, or protected veteran status.

Company Overview

MaxLinear is a global, NASDAQ-traded company (MXL) where the entrepreneurial spirit is alive and well. We are a fabless system-on-chip product company, striving to improve the world's communication networks for everyone through our highly integrated radio-frequency (RF), analog, digital, and mixed-signal semiconductor solutions for access and connectivity, wired and wireless infrastructure, and industrial and multi-market applications.

We hire the best people in the industry and engage them in some of the most exciting opportunities that connect the world we live in today. Our growth has come from innovative, bold approaches to solving some of the world's most challenging communication technology problems in the most efficient and effective manner.

MaxLinear began by developing the world's first high-performance TV tuner chip using standard CMOS process technology. Others said we couldn't achieve the extremely high-performance requirements using CMOS, but we proved them wrong and achieved enduring global market leadership with our designs. Since then, we've developed a full line of products that drive 4G and 5G infrastructure; enable data center, metro and long-haul optical interconnects; bring 10Gbit to the home; power the IoT revolution; and enable robust and reliable communication in harsh industrial environments. Over the years, we've expanded through organic growth and through several acquisitions that have perfectly complemented our existing portfolio and enabled us to deliver complete end-to-end solutions in our target markets. One such example was the acquisition of Intel's Home Gateway Platform Division that added Wi-Fi, Ethernet, and Broadband Gateway Processor SoC technology to our connected home portfolio creating a complete and scalable platform of connectivity and access solutions to fully address our customers' needs.

Our headquarters are in Carlsbad, near San Diego, California. We also have major design centers in Irvine and San Jose, California; Vancouver, Canada; Valencia, Spain; Bangalore and Chennai, India; Munich, Germany; Israel; and Singapore.

We have approximately 1,500 employees, a substantial majority of whom have engineering degrees and include masters and Ph.D. graduates from many of the premiere universities around the world. Our employees thrive on innovation, outstanding execution, outside-the-box thinking, nimbleness, and collaboration. Together, we form a high-energy business team that is focused on building the best and most innovative products on the market.

Responsibilities MaxLinear is seeking a Senior Staff ASIC Design Engineer to join our growing team. In this role, you will focus on the following: - Work with the ASIC verification team to define SoC verification strategies, test plans, and execution plans

• Own and be responsible for IP-level ASIC verification efforts toward SOC T/O. Participate in chip bring-up, debugging, and resolving issues

• Implement best industry practices for SoC verification. Improve and harmonize verification methodology across the organization to maximize efficiency and predictability of outcomes

• Mentor junior members in technical skills and monitor their deliverables

• Deliver test bench architecture, functional models, and complete test environments and test suites meeting coverage targets to ensure first-time silicon success

• Collaborate with the design team and project stakeholders on testability improvements and the debug process during test bench bring-up