Marvell first revolutionized the digital storage industry by moving information at speeds never thought possible! Today, that same breakthrough innovation remains at the heart of the company's storage, network infrastructure, and wireless connectivity solutions.
With leading intellectual property and deep system-level knowledge, Marvell's semiconductor solutions continue to transform the Enterprise, Data Center, SMB, Cloud, Automotive, Industrial, and Consumer markets. You will be solving new technical challenges alongside leading industry professionals in an open, creative environment with plenty of opportunities for personal / professional growth. Join our ambitious team within a multi-nation, multi-cultural company.
Marvell develops leading-edge products within a unique high-tech environment that motivates & encourages continued learning and growth! What You Will Be Doing The Data Storage SOC is an exciting, rewarding and dynamic area, providing many opportunities for professional growth! As part of Marvell's Data Storage division, we develop and implement the leading edge SoC solutions.
You work closely with your peers, Test Engineers, Field Application Engineers and Product Engineers to find the optimal and most cost efficient solution for our customers. Your Key Responsibilities Will Include Perform RTL coding. Perform functional verification of design on block and system level.
Perform synthesis and timing closure. Design and integrate IPs for SoC solutions using state-of-the-art IC design methodologies and design flows. Provide design documentation, description and information to application engineers, field application engineers, test engineers, production engineers and customers.
Education & Experience Necessary for Success You must be familiar with Digital IC design methodologies, understand all stages of ASIC design flows, and experienced with state-of-the-art design tools. You will be strong in logic design and verification, and have solid knowledge of related VLSI architectures. BS in EE/CE Required; MSEE preferred & 3+ years of Digital ASIC Design experience Strong Knowledge of HDL and experience in behavioral and RTL coding, Verilog preferred.
Strong Knowledge of logic synthesis and timing analysis. Knowledge of Data Storage product is a plus. Knowledge with writing C or Assembly code to verify the design. Knowledge of ARM standard bus interfaces like AXI, AHB, APB #LI-LH1 #GLDR
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.