Principal / Lead Engineer, Digital Design - Audio Codec

Qualcomm San Diego , CA 92140

Posted 2 months ago

Job Detail

Job IdE1970757Job TitlePrincipal / Lead Engineer, Digital Design

  • Audio CodecPost Date03/12/2019CompanyQualcomm Technologies, Inc.

Job AreaEngineering

  • Hardware

LocationCalifornia

  • San Diego

Job Overview Lead digital SoC projects from RTL design, DFT, implementation all the way to tapeout. Actively participate in defining architecture and design specifications with the larger team and implementation strategies and tactics to meet aggressive performance and schedule goals. Perform Verilog RTL coding of block level designs and SoC level integration. Work closely with Design Verification team in helping fix design bugs and in achieving code coverage and functional coverage closure. Work with PD team in driving design to timing closure." id="hdnJobOverview" /> Lead digital SoC projects from RTL design, DFT, implementation all the way to tapeout. Actively participate in defining architecture and design specifications with the larger team and implementation strategies and tactics to meet aggressive performance and schedule goals. Perform Verilog RTL coding of block level designs and SoC level integration. Work closely with Design Verification team in helping fix design bugs and in achieving code coverage and functional coverage closure. Work with PD team in driving design to timing closure.All Qualcomm employees are expected to actively support diversity on their teams, and in the Company.Minimum Qualifications Bachelor's degree in Science, Engineering, or related field.
8+ years ASIC design, verification, or related work experience." id="hdnMinimumQualifications" /> Bachelor's degree in Science, Engineering, or related field.
8+ years ASIC design, verification, or related work experience.Preferred Qualifications MS, Electrical Engineering with 10+ years of ASIC/SoC design experience 3+ years of project leadership experience with entire ASIC/SoC design cycle (Verilog, Synopsys Design Compiler, Prime Time, BIST/SCAN insertion, RTL/gate level verification, Back End ASIC/SoC). Proficient in RTL coding, synthesis, and microarchitecture design. Must be hands-on and have ASIC/SoC chip-level leadership experience. Experience with the AHB bus protocol and SoC integration. Design lead experience of Audio Codec or Audio Singla Processor Low Power SoC architecture and design experience Experience with implementing DSP blocks such as FIR filters, IIR filters etc. and other hardware accelerators in fixed point arithmetic. Experience with integrating on-chip microcontrollers/microprocessors. Knowledge of DSP theory." id="hdnPreferredQualifications" /> MS, Electrical Engineering with 10+ years of ASIC/SoC design experience 3+ years of project leadership experience with entire ASIC/SoC design cycle (Verilog, Synopsys Design Compiler, Prime Time, BIST/SCAN insertion, RTL/gate level verification, Back End ASIC/SoC). Proficient in RTL coding, synthesis, and microarchitecture design. Must be hands-on and have ASIC/SoC chip-level leadership experience. Experience with the AHB bus protocol and SoC integration. Design lead experience of Audio Codec or Audio Singla Processor Low Power SoC architecture and design experience Experience with implementing DSP blocks such as FIR filters, IIR filters etc. and other hardware accelerators in fixed point arithmetic. Experience with integrating on-chip microcontrollers/microprocessors. Knowledge of DSP theory.Education RequirementsPreferred: MS, Electrical Engineering" id="hdnEducationalRequirements" />Required: Bachelor's degree in Science, Engineering, or related field

Preferred: MS, Electrical EngineeringKeywords


icon no score

See how you match
to the job

Find your dream job anywhere
with the LiveCareer app.
Mobile App Icon
Download the
LiveCareer app and find
your dream job anywhere
App Store Icon Google Play Icon
lc_ad

Boost your job search productivity with our
free Chrome Extension!

lc_apply_tool GET EXTENSION

Similar Jobs

Want to see jobs matched to your resume? Upload One Now! Remove
Digital Design Engineer

Peregrine Semiconductor

Posted 1 week ago

VIEW JOBS 4/12/2019 12:00:00 AM 2019-07-11T00:00 pSemi Corporation is a Murata company driving semiconductor integration. pSemi builds on Peregrine Semiconductor's 30-year legacy of technology advancements and strong IP portfolio but with a new mission—to enhance Murata's world-class capabilities with high-performance semiconductors. With a strong foundation in RF integration, pSemi's product portfolio now spans power management, connected sensors, optical transceivers, antenna tuning and RF frontends. These intelligent and efficient semiconductors enable advanced modules for smartphones, base stations, personal computers, electric vehicles, data centers, IoT devices and healthcare. From headquarters in San Diego and offices around the world, pSemi's team explores new ways to make electronics for the connected world smaller, thinner, faster and better. The temporary Digital Design Engineer is on the Digital Engineering team within the Engineering Infrastructure Department. This engineer's primary responsibility is to perform physical design for silicon, SOI, and other integrated circuit process technology products. Tasks involve working with digital RTC design teams in support of pSemi's Product Development by performing 'back-end' tasks such as verification, synthesis, constraint file development, timing closure, and autorouting. Other responsibilities include standard cell library generation and verification, Verilog simulation, design verification, fault coverage, and generation of test vectors for production, characterization, and life cycle. This position will interface with product development, digital design, test, process, and reliability engineers. Roles & Responsibilities This position has responsibility for: * Synthesis from Verilog RTL * Constraint file generation, Clock Tree Synthesis * Encounter autorouting including some manual routing * Post layout timing analysis * Standard Cell Library Development / Characterization * Test Vector Generation * Provide technical leadership, insight, mentoring, and support to the digital design team Competency Requirements In order to perform the job successfully, an individual should demonstrate the following competencies: * Critical Thinking: Skilled at finding logical flaws in arguments and plans; identifies problems and solutions that others might miss; provides detailed insight and constructive criticism into problems and complex situations * Working with Ambiguity: Achieves forward progress in the face of poorly defined situations and/or unclear goals; able to work effectively with limited or partial information * Displaying Technical Expertise: Keeps his/her technical skills current; effectively applies specialized knowledge and skills to perform work tasks; understands and masters the technical skills, knowledge, and tasks associated with his/her job; shares technical expertise with others * Driving for Results: Aggressively pursues challenging goals and objectives; will to put in considerable time and effort to accomplish objectives; takes a highly focused, goal driven approach toward work * Making Accurate Judgments and Decisions: Bases decisions on a systematic review of relevant facts and information; avoids making assumptions or rushing to judgment; provides clear rationale for decisions Minimum Qualifications (Experience and Skills) * 6 years of experience in related field * Standard Cell Library use, implementation, development, and characterization * Synchronous design in Verilog * Design Verification techniques * Software programming ability and/or scripting in high level language; C, Python * Scripting and software skills to develop or enhance productivity tools and familiarity with IC design techniques * Understanding of CMOS transistor level design; ability to understand design specifications and translate into digital block requirements * Ability to communicate across multiple cross functional teams Preferred Qualifications * Familiarity with Cadence design environment: Incisive, Virtuoso, Liberate, Encounter, Conformal, Tempus * Understanding of digital testing, scan insertion, vectors, and their generation * Ability to work in a fast paced, multi-tasking environment * Communication and presentation skills Education Requirements * Master's degree in Electrical Engineering or Computer Engineering Work Environment This job operates in a professional office environment. This role routinely uses standard office equipment. Physical Demands The physical demands described here are representative of those that must be met by an employee to successfully perform the essential functions of this job. While performing the duties of this job, the employee is regularly required to talk or hear. The employee frequently is required to stand; walk; use hands to finger, handle or feel; and reach with hands and arms. Specific vision abilities required by this job include close vision, distance vision, color vision, peripheral vision, depth perception and ability to adjust focus. This position requires the ability to occasionally lift office products and supplies, up to 20 pounds. pSemi Corporation supports a diverse workforce and is committed to a policy of equal employment opportunity for applicants and employees. pSemi does not discriminate on the basis of age, race, color, religion (including religious dress and grooming practices), sex/gender (including pregnancy, childbirth, or related medical conditions or breastfeeding), gender identity, gender expression, genetic information, national origin (including language use restrictions and possession of a driver's license issued under Vehicle Code section 12801.9), ancestry, physical or mental disability, legally-protected medical condition, military or veteran status (including "protected veterans" under applicable affirmative action laws), marital status, sexual orientation, or any other basis protected by local, state or federal laws applicable to the Company. pSemi also prohibits discrimination based on the perception that an employee or applicant has any of those characteristics, or is associated with a person who has or is perceived as having any of those characteristics. Note: The Peregrine Semiconductor name, Peregrine Semiconductor logo and UltraCMOS are registered trademarks and the pSemi name, pSemi logo, HaRP and DuNE are trademarks of pSemi Corporation in the U.S. and other countries. All other trademarks are the property of their respective companies. pSemi products are protected under one or more of the following U.S. Patents: http://patents.psemi.com Peregrine Semiconductor San Diego CA

Principal / Lead Engineer, Digital Design - Audio Codec

Qualcomm