Principal Digital Design Engineer

The Allegro team is passionate about providing intelligent solutions that move the world toward a safer and more sustainable future. With more than 30 years of experience developing advanced semiconductor technology, innovation with purpose touches every aspect of our business. From customer engagement and employee recognition to technology advancement and serving the local communities in which we maintain offices, innovation consistently drives our mission and definition of success.

As part of our innovation, we recognize that our team members are unique and that our work locations must be adaptable. At Allegro we flex.

Flex@Allegro is our approach to hybrid work that empowers managers and their team members to decide where and when work will be done. Ask what Flex@Allegro can mean for you.

Part of a growing and dynamic team that primarily focuses on developing high-performance, efficient Mixed-Signal Sensors and works with industry leading customers to develop advanced solutions for Automotive, Industrial, Communications and Computer systems.

Duties:

• Interpret Top level Requirements, analyze feasibility, provide feedback to Product definers, and derive lower-level requirements during the specification phase of IC.

• Lead Digital Design efforts for Block and Top-level Digital Circuits from Specification to Synthesized and STA clean netlist.

• Interface with Digital Verification team for Verification Plan reviewing and design debugging.

• Interface with Physical Design team for the definition of Physical, Timing and DFT constraints.

• Interface with Product Development team to develop and optimize Test strategy.

Requirements:

Bachelor's degree in Electrical or Electronic Engineering and eight (8) years of experience in Digital or Mixed Signal IC design; or Master's degree in Electrical or Electronic Engineering and six (6) years of experience in Digital or Mixed Signal IC design; or PhD in Electrical or Electronic Engineering and three (3) years of experience in Digital or Mixed Signal IC design. Total experience must include three (3) years of experience with Clock Domain Crossings; RTL Design and Logic Synthesis; and Low Power UPF.

Hybrid office/home work schedule.

At Allegro, we are committed to providing a harassment-free environment of mutual respect to fuel innovation through inclusive thought collaboration. Allegro is an Equal Opportunity Employer and does not discriminate on the basis of race, religion, color, sex, gender identity, sexual orientation, age, physical or mental disability, national origin, veteran status, parental status, or any other basis covered by appropriate law. Allegro makes hiring decisions based solely on qualifications, merit, and business needs at the time.

Eligible applicants must reside in a state where Allegro currently has an office location: This includes New Hampshire, Massachusetts, Texas, Oregon, and Michigan. Certain positions (such as field sales roles) may be exempt from this requirement.