Pnr Lead Engineer -San Jose CA

As a PnR Lead Engineer at iSoftTek Solutions Inc, you will be responsible for leading the physical design and place & route (PnR) activities for our clients' semiconductor designs. You will work closely with cross-functional teams to ensure the successful implementation of complex ASIC and FPGA designs.

We are seeking a candidate with a strong background in physical design and PnR methodologies. The ideal candidate should have experience with industry-standard EDA tools, be knowledgeable in floorplanning, power planning, and routing techniques, and be able to deliver high-quality designs within tight schedules.

Role/Responsibilities:

Signoff: Years experience in Static-IR/Dynamic-IR/Power-EM/Signal-EM Analysis using RHSC, good IR Analysis using RH

Implementation:  Synthesis, CDC (clock domain crossing) concepts and analysis, Industry standard tools like Design compiler/Genus, ICC2/Fusion Compiler/Innovus, Familiarity with netlist verification – CLP (low power checks), design checks, linting checks etc.

STA:  Good timing concepts, Good understanding of StarRC/Prime time or QRC/Tempus tool, Ability to understand timing reports, analyze and identify timing bottlenecks, exposure in timing closure flow.

Must have tapped out multiple projects and closed complete Signoff. Familiar to Vector/Vectorless flow using Redhawk SC tool.

Help Block IR closure as well.

Requirements

Requirements:

8 to 12 years of relevant experience in physical design and place & route (PnR)

Able to handle top level, sub system level and block level timing analysis and Fixes.

Expert in TCL or Python scripting.

Have experience in leading & Managing teams from different GEO’s.

Experience with industry-standard EDA tools such as Cadence Innovus or Synopsys ICC

Strong proficiency in floorplanning, power planning, and routing techniques

Knowledge of clock tree synthesis and optimization

Experience with static timing analysis and timing closure

Understanding of design for manufacturability (DFM) and design for testability (DFT) techniques

Excellent problem-solving and analytical skills

Good communication and collaboration abilities

BS or MS degree in Electrical Engineering or a related field