The Autopilot Hardware team is looking for a Memory Controller RTL Design Engineer to join our Austin, TX office. The role includes working with the team on feature definition, rtl design, documentation, performance analysis, timing closure, and verification support on a high performance memory scheduler.
The successful applicant will join a team of deeply knowledgeable engineers and have an opportunity to have an immediate impact on the next generation Autopilot SOC.
Deliver high-quality verilog
Design, implement, and debug new features
Work with architects and performance team to optimize the SOC
Execute tasks within defined schedule
Make performance and optimization trade-offs to meet product requirements
Candidate must have Bachelor/Master's degree in Computer Science, Computer Engineering, Electrical Engineering or related field
5+ years of experience in rtl design/microarchitecture of memory controller or axi interconnect
Knowledge in at least one dram protocols(GDDR/LPDDR/DDR/HBM)
Knowledge of DFI/phy training is a plus
Knowledge of AXI/ACE is a plus
Proficiency in computer architecture
Strong written and oral communication skills