GPU Design Verification Engineer

Position Summary

Samsung, a world leader in advanced semiconductor technology, is founded on a simple philosophy - the endless pursuit of excellence will create a better world for all. At Samsung Austin Research and Development Center (SARC) and Advanced Computing Lab (ACL), we are building a center of excellence for Intellectual Property (IP) that is applied to high-performance computing devices (mobile, automotive, and other custom market segments) consumed by millions of people around the world. Come build with us!

Role and Responsibilities

As a Design Verification Engineer you will contribute to the functional verification of GPU Shader Subsystem. Other responsibilities will include:

• Work with architects and designers to build verification environments and test plans

• Craft functional verification coverage strategy to ensure complete test suite implementation

• Develop assertions and checks to minimize bug isolation time and produce meaningful failing signatures

• Analyze failing tests to root cause, working alongside RTL and reference modeling teams

• Provide input on Architectural and Micro-Architectural specifications for testability and accuracy

• Examine code coverage results to identify exclusions and improve stimulus

• Take ownership of key milestone closure by meeting development phase pass rates, coverage quality, and other quality metrics

Skills and Qualifications

• BS Computer Engineering, BSEE, or comparable and 6 + years industry experience in a design verification role or Master's Degree plus 4 years experience or PhD plus 2 years experience

• Proficient in System Verilog/UVM/OVM, and OOP/C++

• Deep understanding of constrained randomization and the development of efficient test suites

• Experience with code coverage and functional coverage driven verification methodology.

• Experience in creating, running and debugging of SystemVerilog/UVM constraint-random testbench.

• Working knowledge of scripting languages such as Python or Perl

• Understanding of micro-architecture, logic design, FSMs, arithmetic data path pipelines

Pay Transparency

At Samsung - SARC/ACL, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $144,345.00 and $257,336.00. Your actual base pay will depend on variables that may include your education, skills, qualifications, experience, and work location.

Samsung employees have access to benefits including: medical, dental, vision, life insurance, 401(k), free onsite lunch, employee purchase program, tuition assistance (after 6 months), paid time off, student loan program, wellness incentives, and many more. In addition, regular full-time employees (salaried or hourly) are eligible for MBO bonus compensation, based on company, division, and individual performance.

Additionally, this role might be eligible to participate in long term incentive plan and relocation.

U.S. Export Control

This position requires the ability to access information subject to U.S. export control restrictions. Applicants must have the ability to access export-controlled information or be eligible to receive a government authorization to access export-controlled information.

Trade Secrets

By submitting an application, you [applicant] agree[s] not to disclose to Samsung, or induce Samsung to use, any confidential or proprietary information (including trade secrets) belonging to any current or previous employer or other person or entity.

#SARC #ACL #Hybrid

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