Sorry, this job is no longer accepting applications. See below for more jobs that match what you’re looking for!

Engineering Fellow - Embedded Test Architecture

Expired Job

Raytheon Tucson , AZ 85701

Posted 2 months ago

Location: Tucson Arizona Security Clearance: Secret

  • Current Check us out on YouTube: Raytheon Company Overview Are you ready to be remarkable with Raytheon?
    Raytheon Missiles Systems (RMS) Systems Test Directorate is seeking strategic technical leaders passionate about effective application of Systems Engineering to deliver world-class missile systems to our defense customers.
    As part of Raytheons Test Strategy and Architecture initiatives, the company is seeking experts in the field of Embedded Test Architecture (ETA) . ETA is defined as the incorporation of test capabilities, hardware and software, into the prime development item to support testing across the products life cycle.
    ETA development includes incorporation of test capabilities to support the following: a) Customer requirements such as BIT Coverage across the system states and modes, b) integration and development tests using functional test environments, c) performance tests on CIL and HIL test environments, and d) support of logistic capabilities such as software reprogramming.
    ETA development includes performing cost trades to properly scope test capabilities within the products defined cost allocation; derivation of hardware test structures for integration into the prime development item to support built in test and facilitate development testing; and derivation of software structures to include process definitions and built in test algorithms.
    The Embedded Test Architect should be knowledgeable on these processes and have the ability to effectively lead a System Test IPT in the development and generation of requirement documentation to facilitate design activities associated with implementing the Embedded Test System.
    Historically embedded test systems have been integrated into complex weapons systems where the cost of a defect escape is high.
    However due to the escalating cost of product development tests and life cycle consideration such as shelf life extension programs, Raytheon recognizes that implementation of an embedded test system into most prime development items can have a positive cost impact across the products life cycle.
    Embedded Test Architecture

  • As a senior engineering leader, the employee will be accountable for architecting, defining, implementing, and verifying an embedded test system to be integrated into the prime development item.
    The employee should have core competencies to lead a System Test IPT in the development of the embedded test system as defined below.
    Ability to develop a test strategy for an embedded test system that meets customer requirements.
    Test strategy includes top level definition of the embedded test system, behavior of the embedded test system across the products system states and modes, definition of key hardware and software test structures to be embedded into the product, and development of a verification strategy to ensure that the implemented embedded test system is compliant to the Customers and Raytheons key requirements.
    Knowledgeable in the development of requirement documentation to provide an actionable requirements set to the Design IPTs, hardware and software.
    Requirements include incorporation of embedded test requirements into product Critical Item Development Specifications and Interface Requirement Documents, and generation of test algorithm specification that define BIT algorithms and structures.
    Ability to effectively communicate, verbally and written, and influence System and Design IPT in the incorporation of the defined embedded test system.
    This includes an ability to conduct system level trade studies to adjudicate various embedded test system approaches in arriving at a cost effective solution that is support by all responsible IPTs.
    Ability to communication to Program and Functional Management relative to the development of the embedded test system.
    Assist in development of tasking relative to development of the embedded test system and incorporation into the Program Plan and Integrated Master Schedule.
    Knowledgeable in the use of Model Based Engineering as applied to the development of an embedded test system.
    Knowledge can include career experiences in the architecture of Test and Evaluation events and environments which used models, simulations, test beds, prototypes, and full-scale Engineering Development Models (EDMs) to satisfy development and environmental/qualification objectives.
    Drive Customer Affordability: Ability to steer requirement flow down and iterative requirement error analyses to support well-defined test requirements and product test limits with cost-effective and achievable measurement uncertainty implications.
    Seek opportunities to drive improvements in product affordability, reliability, and availability through increased embedded and built-in-test capabilities and decreased lifecycle needs for common and peculiar support equipment.
    Leadership & Business Acumen: In addition to having a strong technical competency in Integration and Test, the ETA employee will possess executive presence and have proven leadership capabilities demonstrated at level of a Chief Engineer for a major development acquisition program (MDAP). Strong presentation skills and has had experience briefing to the customer at the military pay grade O6 level (Navy Captain and Colonel and GS/GM-15 civilian employee) and higher.
    Good business acumen and has demonstrated the ability to make a business case and the value proposition for technical decisions being made.
    U.S.
    Citizenship status is required as this position needs an active U.S.
    Security Clearance as of day one of employment.

    Required Skills: Minimum of 12 years experience with systems verification, validation, integration and test or related experience U.S.
    Citizenship is required Minimum of 10 years experience with systems engineering Technical expertise in test methodology for Electro-Optical and Radio Frequency systems.
    Experience with development, environmental qualification, production manufacturing, depot/repair and/or operational testing Technical leadership with new business capture/pursuit experience including contribution or authoring of white papers, RFI responses, proposal of technical volumes or related experience Active DoD Secret Clearance (SSBI desired). Patents, Papers and Publications in related technical field Required Education: Bachelors of Science (B.S.) in math, engineering, science or related technical field.
    (Advance degree desired) This position requires the eligibility to obtain a security clearance.
    Non-US citizens may not be eligible to obtain a security clearance.
    The Defense Industrial Security Clearance Office (DISCO), an agency of the Department of Defense, handles and adjudicates the security clearance process.
    Security clearance factors include, but are not limited to, allegiance to the US, foreign influence, foreign preference, criminal conduct, security violations and drug involvement.
    Employment is contingent on other factors, including, but not limited to, background checks and drug screens.
    Additional information can be found here: 111392 Raytheon is an Equal Opportunity/Affirmative Action employer.
    All qualified applicants will receive consideration for employment without regard to race, color, religion, creed, sex, sexual orientation, gender identity, national origin, disability, or protected Veteran status.
    Raytheon Missile Systems (RMS) is the world leader in the design, development and production of missile systems for critical requirement including air-to-air, strike, surface Navy air defense, land combat missiles, guided projectiles, exoatmospheric kill vehicles, missile defense and directed energy weapons.
    RMS is headquartered in Tucson, Arizona with over 11,000 employees operating at sites across the country and internationally.
    Aerospace Engineering, Electrical Engineering, General Engineering, Industrial Engineering, Integration and Test Engineering, Mechanical Engineering, Systems Engineering, Test Engineering, All, Engineering Aerospace/Aeronautical Engineering, Electrical Engineering, General Engineering, Industrial Engineering, Integration & Test Engineering, Mechanical Engineering, Systems Engineering, Test Engineering JBRaytheon Engineering Fellow
  • Embedded Test Architecture JP2 ICJBMeta

See if you are a match!

See how well your resume matches up to this job - upload your resume now.

Find your dream job anywhere
with the LiveCareer app.
Download the
LiveCareer app and find
your dream job anywhere
lc_ad

Boost your job search productivity with our
free Chrome Extension!

lc_apply_tool GET EXTENSION

Similar Jobs

Want to see jobs matched to your resume? Upload One Now! Remove
Engineering Fellow Fpga/Asic Design

Raytheon

Posted 5 days ago

VIEW JOBS 11/13/2018 12:00:00 AM 2019-02-11T00:00 Requisition ID 111804BR Date updated 11/04/2018 Job Description: Raytheon Missile Systems (RMS) is seeking technical leaders that are passionate about the design and application of configurable logic technologies to the development of world-class defense solutions. RMS is seeking an Engineering Fellow (EF) to help expand the capabilities, quality, and proficiency of Configurable Logic (CL) design within RMS and the company as a whole. This position requires an established depth of expertise in configurable logic design and verification, with a complimentary breadth of experience in adjacent disciplines: electronics design, software design, systems engineering, and signal processing. The candidate shall have demonstrated leadership and visionary thinking in the design and development of advanced electronic systems based on configurable logic technologies. The EF candidate shall demonstrate a high degree of creativity, and ingenuity, in the design of ASICs, FPGAs, and complex heterogeneous processing systems, as well as in the application of advanced verification techniques with an emphasis on the Universal Verification Methodology (UVM), and the creation of new processes to improve the quality of all designs and the proficiency with which they are created. The candidate shall be able to perform in multi-disciplined environments to solve system level problems. The candidate shall similarly be able to drive to identify root cause and formulate solutions to complex failure investigations. The Engineering Fellow will be expected to support multiple programs in the proposal, architecture and design phases to insure the optimal application of configurable logic technologies, coordinating efforts across design disciplines, and organizational boundaries. This coordination will include the oversight of those designs through formal and informal reviews, the application of model-based engineering, and process improvements. The Engineering Fellow will be a focal point for CL design expertise, often relied upon by programs to provide specific complex solutions and analysis, as well as having a broad responsibility to help define technology road maps, propose IRAD projects and set functional priorities to realize those road maps. In addition to advancing the state of the art in CL design and processes, the Engineering Fellow is expected to distribute their expertise through formal and informal mentoring, reviews, educational presentations, and wiki articles. Required Skills: * U.S Citizenship required * A demonstrated extensive depth of knowledge in configurable logic technologies, which includes: Vendor tools and technology from Xilinx, Altera, & Microsemi, Software/Hardware languages (C, C++, VHDL, UVM & System Verilog, Python), comprehensive knowledge of CL design flow, including CM, Simulation, Synthesis, P&R, script languages, verification, and integration. * A demonstrated depth of knowledge in the implementation of modern verification environments that include the use of constrained-random stimulus, functional coverage, code coverage, coverage collectors, scoreboards, monitors, creation of models to use through requirements to verification, and verification plans which determine the appropriate level of verification applications * Experience with emulation and prototyping techniques * Knowledge of industry standard interfaces and protocols such as AXI, PCIe, Ethernet, etc. * A demonstrated breadth of knowledge in adjacent disciplines for example: advanced design verification, electronics design, software design, systems engineering, and signal processing * A demonstrated ability for architecting, modeling, designing, implementing, and testing complex, heterogeneous processing systems. * Experience developing new and novel concepts leading to the capture and execution of technology maturation and development programs, transitioning into real products and deployed systems * Strong written and verbal communication skills, including experience communicating and presenting to all levels of the organization including senior level executives and external customers. * The ability to train and mentor others through various means including informal mentoring, reviews, presentations, publications and training. * Demonstrated leadership experience as a project lead, team lead, technical lead or similar function with direct reports involving creating plans, schedules and cost estimates for design and verification efforts Desired Skills: * Experience with all aspects of embedded system design and development processes * Have a record of Patents, Publications, and/or Technical Presentations to industry * Experience in space and radiation hardened design constraints, such as triple redundancy design, circumvent and recover, etc. * Background in RF, EO, including knowledge of the common algorithms applied to those domains. * Active Secret Clearance/SCI * Knowledge of ASIC design flow and process * Comprehensive knowledge of CL design tools, including CM, Simulation, Synthesis, P&R, script languages, etc. Required Education and Experience: * Bachelor of Science in Computer or Electrical Engineering with a minimum of 15 years of relevant experience. This position requires the successful issuance, transfer or maintenance of any clearances and/or accesses necessary for the position. Non-US citizens may not be eligible to obtain a security clearance. The Defense Industrial Security Clearance Office (DISCO), an agency of the Department of Defense, handles and adjudicates the security clearance process. Security clearance factors include, but are not limited to, allegiance to the US, foreign influence, foreign preference, criminal conduct, security violations and drug involvement. Additional detail regarding security clearance factors can be obtained by accessing the DISCO website at http://www.dss.mil/psmo-i/indus_psmo-i_interim.html 111804BR 111804 Business Unit Profile Raytheon Missile Systems (RMS) is the world leader in the design, development and production of missile systems for critical requirements including air-to-air, strike, surface Navy air defense, land combat missiles, guided projectiles, exoatmospheric kill vehicles, missile defense and directed energy weapons. RMS is headquartered in Tucson Arizona, with over 13,000 employees operating at sites across the country and internationally. Relocation Eligible Yes Clearance Type Secret - Current Expertise Electrical Engineering Type Of Job Full Time Work Location AZ - Tucson Raytheon is an Equal Opportunity/Affirmative Action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, creed, sex, sexual orientation, gender identity, national origin, disability, or protected Veteran status. Raytheon Tucson AZ

Engineering Fellow - Embedded Test Architecture

Expired Job

Raytheon