Design custom VLSI digital circuits for high-speed processor chips in leading-edge CMOS process technology targeted at network and consumer applications.
Develop schematics, perform circuit/timing analysis, oversee layout design work, and perform various CMOS backend-design quality checks.
Perform synthesis, floor planning, place and route, and timing analysis on complex logic blocks.
Interface with the design and RTL teams to drive design modifications to resolve congestion and timing issues.
Interface with tool vendors to drive tool fixes and improvements in support of on-going and planned CAD activities.
Perform tool evaluations of new vendor tools and functions as needed. #LI-KB1 #GLDR Currently pursuing (or recently graduated with) a Masters Degree in Electrical Engineering or has a Bachelor Degree in Electrical Engineering with 2 years of work experience.
Experience with industry standard EDA tools (like HSPICE, Virtuoso, DC, ICC, Innovus, PrimeTime) is a plus.
Good understanding of hardware description language (such as Verilog) and scripting languages (such as Perl and Tcl) is a plus.
Must be self motivated and should be a good team player.
Must have effective interpersonal, teamwork, and communication skills.
Demonstrates good analysis and problem-solving skills.
Must have the ability to multi-task in a fast paced environment.
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.