Director, Product Engineering

Job Summary:

The Director of Cost Entitlement and Product Engineering will lead a global team of highly experienced and talented Product Engineers, responsible for driving product quality improvement, responding to customer field return incidents, and reducing product cost. This role will also be critical in shaping the production release and ramp infrastructure by implementing, monitoring, and driving processes, standards, and requirements, designed to achieve entitlement in cost and quality.

Primary responsibilities will include owning all New Product Ramp and Product Sustaining Activities of legacy products:

1.Responsibility of new product releases, YE (yield enhancements) activities, resolution of production and customer quality and reliability issues in a timely manner, and owner of all cost reduction activities.

2.Responsibility to drive process and execution improvement strategies across all product families.

3.Drive aggressive cost reduction activities such as test time reduction, flow optimizations, burn-in

reduction / elimination and yield improvement activities, early in product ramp.

4.Owner of Entitlement Gap Reduction metrics.

5.Owner of all customer field returns and driver of test improvement activities, based on lessons learned,

and to prevent future such occurrences.

6.Deliver YoY Gross Margin improvements.

7.Interface with factories (FABs, Assembly Sites, Test Sites), to drive common PPM and OEE improvement metrics, positively impacting throughput, capacity, cost, and quality.

8.Work closely with NPDE development, Design, Quality (Customer and QRE) on various execution, qualification, field returns, and DfT improvement opportunities.

9.Identify / document gaps, best practices, and lessons learned and feedback to Design, DfT, and PE NPDE teams, to drive better execution across future products.

Good power electronic devices and test knowledge and background, across IGBT and MOSFET discrete and power module products, along with knowledge of ATE platform, DFT strategies and test methods, is a must. Candidate should possess good understanding and knowledge of semiconductor wafer and assembly processes.

Candidate is expected to influence internal and external strategies for ATE, test, quality and yield enhancement. Candidate should be comfortable talking with and presenting to customers, on as needed basis.

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