Digital Verification Engineer

Synaptics San Jose , CA 95111

Posted 6 months ago

About Synaptics:

Synaptics is the pioneer and leader of the human interface revolution, bringing innovative and intuitive user experiences to intelligent devices. Synaptics' broad portfolio of touch, display, biometrics, voice, audio, and multimedia products is built on the company's rich R&D, extensive IP and dependable supply chain capabilities. With solutions designed for mobile, PC, smart home, and automotive industries, Synaptics combines ease of use, functionality and aesthetics to enable products that help make our digital lives more productive, secure and enjoyable. (NASDAQ: SYNA)

Job Scope:

Synaptics is looking for qualified applicants for Digital Verification Engineer on the Interface Products team. This role is a unique opportunity to perform block and full chip digital verification for Synaptics' next generation data and video connectivity ASICs.

As a member of the design verification team, the responsibilities for this position include functional verification at block, subsystem and full-chip levels using techniques such as constrained random testing to achieve code and functional coverage objectives.

Job Responsibilities

  • Deliver detailed test plans for verification of interface designs by working with design engineers and architects and by reviewing specification documents.

  • Create and enhance constrained-random verification environments using System Verilog and UVM.

  • Identify and write all types of coverage measures for stimulus and corner-cases.

  • Debug tests with design engineers to deliver functionally correct design blocks.

  • Close coverage measures to identify verification holes and to enable high confidence tape-out.

  • Maintain and enhance DV flow setup.

  • Support system validation and test teams for test vector generation and system bring up.

Job Qualifications

  • MSEE/CS +5 years of IC digital verification experience.

  • Organized and creative thinker, motivated, and independent learner who can multitask in a dynamic environment, able to create and implement new solutions where required

  • Expertise in UVM or equivalent System Verilog object oriented verification methodology

  • Knowledge of high-speed serial protocols like USB, DisplayPort, PCIE, HDMI.

  • Experience in script writing in PERL, Python

  • Knowledge of C, C++ and UNIX

  • Experience in full chip and block-level verification, including BFM model development and integrating 3rd party VIP.

  • Exposure to the various verification techniques such as coverage based verification, formal verification techniques etc

Synaptics is an Equal Opportunity Employer


icon no score

See how you match
to the job

Find your dream job anywhere
with the LiveCareer app.
Mobile App Icon
Download the
LiveCareer app and find
your dream job anywhere
App Store Icon Google Play Icon

Boost your job search productivity with our
free Chrome Extension!

lc_apply_tool GET EXTENSION

Similar Jobs

Want to see jobs matched to your resume? Upload One Now! Remove
Senior Asic Design Verification Engineer

Micron Technology, Inc.

Posted 4 days ago

VIEW JOBS 10/11/2019 12:00:00 AM 2020-01-09T00:00 Relocation Level: Domestic Recruiter: Luong Phu Micron Technology's vision is to transform how the world uses information to enrich life and our commitment to people, innovation, tenacity, collaboration, and customer focus allows us to fulfill our mission to be a global leader in memory and storage solutions. This means conducting business with integrity, accountability, and professionalism while supporting our global community. The Senior ASIC Design Verification Engineer will be part of our senior technical member of Micron's ASIC Verification and Emulation group. This individual will have a key role in the architecture and development of advanced verification environments for complex SoC components while ensuring on-time, one-time best-in-class quality. Job Requirements * An expert level with developing UVM-based SV test-benches. * Experienced with defining block, sub-system, and SOC top-level test plans. * Relevant hands-on experience with PCIe and NVMe is a plus * A deep understanding and knowledge of verification methodologies, flows, and quality metrics * Great debugging and problem-solving skills. * Team player with great interpersonal communication skills. Job Qualifications * At least 5 years of relevant experience in the NVMe/PCIe domain. * Strong and relevant expertise with ASIC simulation tools and advanced verification methods. * Expert level in verification languages such as UVM and System Verilog. * Relevant experience with writing block-level and SoC test-plans. * Education: B.S. in electrical engineering, computer science with extensive industry experience. About Us As the leader in innovative memory solutions, Micron is helping the world make sense of data by delivering technology that is transforming how the world uses information. Through our global brands — Micron, Crucial and Ballistix — we offer the industry's broadest portfolio. We are the only company manufacturing today's major memory and storage technologies: DRAM, NAND, NOR, and 3D XPoint™ memory. Our solutions are purpose-built to leverage the value of data to unlock financial insights, accelerate scientific breakthroughs and enhance communication around the world. Micron Benefits Employee Rewards Program, Healthcare, Paid time off (Combined Sick and Vacation Time), Retirement savings plans, Paid maternity/paternity leave, Employee Assistance Program, Professional development training, Workplace wellness programs, Micron Health Clinic (Boise only), Fitness Center / Activity rooms (Boise only), Tuition Reimbursement, Micron Corporate Discounts, Casual Dress attire. We recruit, hire, train, promote, discipline and provide other conditions of employment without regard to a person's race, color, religion, sex, age, national origin, disability, sexual orientation, gender identity and expression, pregnancy, veteran's status, or other classifications protected under law. This includes providing reasonable accommodation for team members' disabilities or religious beliefs and practices. Each manager, supervisor and team member is responsible for carrying out this policy. The EEO Administrator in Human Resources is responsible for administration of this policy. The administrator will monitor compliance and is available to answer any questions on EEO matters. To request assistance with the application process, please contact Micron's Human Resources Department at 1-800-336-8918 (or 208-368-4748). Keywords: San Jose || California (US-CA) || United States (US) || NVE (Non-Volatile Engineering Group) || Experienced || Regular || Engineering || #LI-LP1 || Micron Technology, Inc. San Jose CA

Digital Verification Engineer