Design Automation Engineer
In this position you will be working as a product development/deployment Engineer within the Product Engineering Service Group (PESG), developing tools/flows for SoC/Server Designs. This is a unique chance to join an experienced team which is working to deliver the Ease of Use Flow for several design teams across Intel.
In this role responsibilities include, although not limited to:
Define and drive methodology advancement across the execution teams
Provide methodology and flow guidance for design convergence, including design planning
Explore new automation technologies, as well as expand and enable internal and external process technology nodes
Perform Physical design flow from high level design to synthesis, place and route, timing and power
Effectively communicate with larger numbers of design engineers, providing high quality flow, documentation and presentations
Coordinate with other methodology disciplines to ensure a seamless design execution approach
Tune application options and make recommendations for execution on the optimal settings based on design needs
Evaluate and explore new automation technology and advocate for efficiency improvements
Evaluate multiple vendor solutions and guide execution in the most optimal use based on design needs
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
The candidate must have a Master's in Electrical Engineering or Computer Engineering, Engineering Science, Computer Science or equivalent and 2+ years of experience with:
Complete RLS flow: starting from RTL to synthesis, placement, clocking, route, layout etc.
CAD tools (SKILL, PERC, etc)
Perl and TCL
Inside this Business Group
The Infrastructure and Platform Solutions Group (IPSG) builds the silicon and platform infrastructure for Intel's silicon design teams. IPSG is comprised of a reusable pool of infrastructure IP blocks, design enabling services such as tools and automation, and a best-in-class post silicon ecosystem that ramps quickly to high volume manufacturing and validation. Our primary mission is to protect Intel's brand by providing the infrastructure necessary to enable all of Intel's products to hit the market on a dependable and predictable cadence.
US, Arizona, Phoenix;US, California, Folsom;US, California, Santa Clara;US, Massachusetts, Hudson;US, Oregon, Hillsboro;US, Texas, Austin
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
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