IBM is hiring a CPU HW Power/Performance Validation Leadin our Austin, TX location.
We are seeking a CPU HW power/performance validation lead who can develop a validation strategy to deliver Power/Performance infrastructure for validation, optimization, and tuning of the POWER microprocessors for next generation IBM Cognitive Servers.
As part of the world class team that designed the #1 & #2 fastest supercomputers in the world, you'll be a key part of the team to drive innovation into the next generation POWER microprocessors & accelerators to be included in IBM and OpenPOWER partner servers and supercomputers.
Key member of the CPU design community responsible for architecting and leading the strategy to drive seamless pre-silicon to post-silicon validation, optimization and tuning of power/performance for IBM POWER microprocessors. Develop a power/performance testplan and testcases to target the ISA, microarchitecture, the fundamentals of the design, and generational benchmark improvements.
Identify techniques for rapid design learning and propose solutions to alleviate design pinch points. Identify techniques for design tuning and HW algorithm optimization. Focus on continuous improvement of the HW design learning, validation, optimization, and tuning processes.
The candidate will have previous experience with pre-silicon and post-silicon debug tools and methodologies. Experience in analyzing HW and SW performance of microprocessor designs.
Experience working across HW validation, HW design, SW development, and modeling teams to resolve debug issues. Server microprocessor design experience preferred. HW validation experience preferred.
Familiarity with POWER ISA preferred. We are looking for a senior engineer with a proven track record of working across teams to resolve complex problems identified during pre- and post-silicon validation. Ability to effectively communicate in written and verbal presentations is essential.