Asic Digital Design Engineer

Promedia Santa Clara , CA 95050

Posted 2 weeks ago

W-2 CONTRACT ONLY
Job Description

  • As an ASIC Design Engineer, you will be responsible for digital signal processing hardware designs, specifically data path as well as control intensive digital designs.
  • You will work with the architects of Systems, as well as other SoC team ASIC designers and software engineers to micro-architect and implement designs specific to Digital Sensor subsystems for integration into SoC for mobile applications.

Minimum Qualifications

  • Bachelor's degree in Science, Engineering, or related field.
  • 3+ years ASIC design, verification, or related work experience.
  • Synthesis, LEC, Power Extraction tools (PTPX), Primetime, RTL Linting tools and extensive usage of simulation tools. C/C++, System Verilog, Tcl/Perl/Python shell-scripting skills required
  • Experience with ASIC ECO flow, RTL sanity tools specific to Design Rule Checking and Clock Domain Crossing checks Familiarity with MBIST and DFT flow
  • Experience with any of HLS tools: Catapult / Cadence Stratus System C & Matlab

Preferred Qualifications

  • 4+ years of RTL design experience on-chip with custom digital logic
  • Should have extensively used the ASIC RTL FPGA experience is a plus
  • Experience with sensor data processing is a bonus
  • Gate level Simulation debug and usage of power extraction tools a plus

Education

  • Required: Bachelor's, Computer Engineering and/or Electrical Engineering
  • Preferred: Master's, Computer Engineering and/or Electrical Engineering

Duration

  • 1 Year +
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Asic Digital Design Engineer

Promedia